A control-gate-assisted erasing method for a single-poly EEPROM cell with metallic control gate structureDAKE WU; RU HUANG; WAISUM WONG et al.Semiconductor science and technology. 2009, Vol 24, Num 7, issn 0268-1242, 075012.1-075012.4Article

Performance improvement of the EEPROM cells with the standard logic process featuring a metal finger coupling capacitorPOREN TANG; RU HUANG; DAKE WU et al.Semiconductor science and technology. 2010, Vol 25, Num 12, issn 0268-1242, 125003.1-125003.4Article

A low-voltage flash memory cell utilizing the gate-injection program/erase method with a recessed channel structureDAKE WU; RU HUANG; PENGFEI WANG et al.Semiconductor science and technology. 2008, Vol 23, Num 7, issn 0268-1242, 075035.1-075035.5Article

Scaling capability improvement of silicon-on-void (SOV) MOSFETYU TIAN; WEIHAI BU; DAKE WU et al.Semiconductor science and technology. 2005, Vol 20, Num 2, pp 115-119, issn 0268-1242, 5 p.Article

A Novel RF LDMOS Fabricated With Standard Foundry TechnologyHAN XIAO; LIJIE ZHANG; RU HUANG et al.IEEE electron device letters. 2009, Vol 30, Num 4, pp 386-388, issn 0741-3106, 3 p.Article

Novel Thermally Stable Single-Component Organic-Memory Cell Based on Oxotitanium Phthalocyanine MaterialYONGBIAN KUANG; RU HUANG; YU TANG et al.IEEE electron device letters. 2009, Vol 30, Num 9, pp 931-933, issn 0741-3106, 3 p.Article

A novel source/drain on void (SDOV) MOSFET implemented by local co-implantation of hydrogen and heliumDAKE WU; RU HUANG; WEIHAI BU et al.Microelectronic engineering. 2008, Vol 85, Num 7, pp 1490-1494, issn 0167-9317, 5 p.Article

A novel vertical channel self-aligned split-gate flash memoryDAKE WU; FALONG ZHOU; RU HUANG et al.Solid-state electronics. 2009, Vol 53, Num 2, pp 124-126, issn 0038-1101, 3 p.Article

Unipolar Resistive Switch Based on Silicon Monoxide Realized by CMOS TechnologyLIJIE ZHANG; RU HUANG; DEJIN GAO et al.IEEE electron device letters. 2009, Vol 30, Num 8, pp 870-872, issn 0741-3106, 3 p.Article